Tehnilised dokumendid
Spetsifikatsioonid:
Mounting Type
Surface Mount
Package Type
TDFN
Pin Count
10
Dimensions
3 x 3 x 0.75mm
Length
3mm
Width
3mm
Height
0.75mm
Maximum Operating Supply Voltage
3.46 V, 3.63 V
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
2.97 V, 3.13 V
Maximum Operating Temperature
+85 °C
Maximum Output Frequency
100MHz
Päritoluriik
Taiwan, Province Of China
Toote üksikasjad
Si521xx PCIe Clock Generators, Silicon Labs
The Silicon Labs Si521xx PCI-Express clock generators feature low-power push-pull output buffer technology reducing the external terminating resistors and enabling smaller packaging.
To increase performance they support programmable drive strength, rise/fall times, output impedance and down spread spectrum clock generation is also supported.
The devices support the standard PCIe HCSL signalling format and can be externally terminated to support LVPECL, LVDS or CML levels.
Lao andmed ajutiselt ei ole saadaval.
Palun kontrollige hiljem uuesti.
€ 2,80
tk (lindis) (ilma käibemaksuta)
€ 3,416
tk (lindis) (koos käibemaksuga)
100
€ 2,80
tk (lindis) (ilma käibemaksuta)
€ 3,416
tk (lindis) (koos käibemaksuga)
100
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Tehnilised dokumendid
Spetsifikatsioonid:
Mounting Type
Surface Mount
Package Type
TDFN
Pin Count
10
Dimensions
3 x 3 x 0.75mm
Length
3mm
Width
3mm
Height
0.75mm
Maximum Operating Supply Voltage
3.46 V, 3.63 V
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
2.97 V, 3.13 V
Maximum Operating Temperature
+85 °C
Maximum Output Frequency
100MHz
Päritoluriik
Taiwan, Province Of China
Toote üksikasjad
Si521xx PCIe Clock Generators, Silicon Labs
The Silicon Labs Si521xx PCI-Express clock generators feature low-power push-pull output buffer technology reducing the external terminating resistors and enabling smaller packaging.
To increase performance they support programmable drive strength, rise/fall times, output impedance and down spread spectrum clock generation is also supported.
The devices support the standard PCIe HCSL signalling format and can be externally terminated to support LVPECL, LVDS or CML levels.