Tehnilised Dokumendid
Spetsifikatsioonid:
Brand
onsemiProduct Type
18 Bit D Type Latch
Logic Family
4000
Latch Mode
Transparent
Logic Function
RS-Latch
Number of Channels
4
Output Type
3 State
Polarity
Non-Inverting
Mount Type
Surface
Minimum Supply Voltage
-5V
Package Type
SOIC
Pin Count
16
Maximum Supply Voltage
18V
Minimum Operating Temperature
-55°C
Maximum Operating Temperature
125°C
Length
10mm
Height
1.5mm
Standards/Approvals
No
Series
4000B
Automotive Standard
AEC-Q100
Toote üksikasjad
The MC14043B and MC14044B quad R-S latches are constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three-state buffers having a common enable input. The outputs are enabled with a logical "1" or high on the enable input, a logical "0" or low disconnects the latch from the Q outputs, resulting in an open circuit at the Q outputs.
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Lao andmed ajutiselt ei ole saadaval.
€ 20,11
€ 0,419 tk (torus 48) (ilma käibemaksuta)
€ 24,94
€ 0,52 tk (torus 48) (koos käibemaksuga)
48
€ 20,11
€ 0,419 tk (torus 48) (ilma käibemaksuta)
€ 24,94
€ 0,52 tk (torus 48) (koos käibemaksuga)
Lao andmed ajutiselt ei ole saadaval.
48
| kogus | Ühikuhind | Per Tuub |
|---|---|---|
| 48 - 432 | € 0,419 | € 20,11 |
| 480 - 912 | € 0,304 | € 14,59 |
| 960+ | € 0,258 | € 12,38 |
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
Tehnilised Dokumendid
Spetsifikatsioonid:
Brand
onsemiProduct Type
18 Bit D Type Latch
Logic Family
4000
Latch Mode
Transparent
Logic Function
RS-Latch
Number of Channels
4
Output Type
3 State
Polarity
Non-Inverting
Mount Type
Surface
Minimum Supply Voltage
-5V
Package Type
SOIC
Pin Count
16
Maximum Supply Voltage
18V
Minimum Operating Temperature
-55°C
Maximum Operating Temperature
125°C
Length
10mm
Height
1.5mm
Standards/Approvals
No
Series
4000B
Automotive Standard
AEC-Q100
Toote üksikasjad
The MC14043B and MC14044B quad R-S latches are constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three-state buffers having a common enable input. The outputs are enabled with a logical "1" or high on the enable input, a logical "0" or low disconnects the latch from the Q outputs, resulting in an open circuit at the Q outputs.
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
