Tehnilised Dokumendid
Spetsifikatsioonid:
Brand
STMicroelectronicsProduct Type
Microcontroller
Series
STM32G491
Package Type
BGA
Mount Type
Surface
Pin Count
100
Device Core
ARM Cortex M4
Data Bus Width
32bit
Program Memory Size
512kB
Maximum Clock Frequency
48MHz
RAM Size
112kB
Maximum Supply Voltage
3.6V
DACs
4 x 12 Bit
Minimum Operating Temperature
-40°C
Analogue Comparators
4
Maximum Operating Temperature
85°C
Height
0.6mm
Length
5.1mm
Standards/Approvals
No
Width
5.1mm
Minimum Supply Voltage
1.71V
Number of Timers
15
Instruction Set Architecture
RISC
Automotive Standard
No
ADCs
1 x 3 Bit
Program Memory Type
FLASH
Toote üksikasjad
The STMicroelectronics 32 bit MCU has ADC1/2 can be used in dual mode ADC3 usable only in single mode. It has no parity check in SRAM 2.It has 512/256K single bank flash. The bus matrix provides access from a master to a slave, enabling concurrent access and efficient operation.
Lao andmed ajutiselt ei ole saadaval.
€ 3 185,00
€ 6,50 Each (In a Tray of 490) (ilma käibemaksuta)
€ 3 949,40
€ 8,06 Each (In a Tray of 490) (koos käibemaksuga)
490
€ 3 185,00
€ 6,50 Each (In a Tray of 490) (ilma käibemaksuta)
€ 3 949,40
€ 8,06 Each (In a Tray of 490) (koos käibemaksuga)
Lao andmed ajutiselt ei ole saadaval.
490
Tehnilised Dokumendid
Spetsifikatsioonid:
Brand
STMicroelectronicsProduct Type
Microcontroller
Series
STM32G491
Package Type
BGA
Mount Type
Surface
Pin Count
100
Device Core
ARM Cortex M4
Data Bus Width
32bit
Program Memory Size
512kB
Maximum Clock Frequency
48MHz
RAM Size
112kB
Maximum Supply Voltage
3.6V
DACs
4 x 12 Bit
Minimum Operating Temperature
-40°C
Analogue Comparators
4
Maximum Operating Temperature
85°C
Height
0.6mm
Length
5.1mm
Standards/Approvals
No
Width
5.1mm
Minimum Supply Voltage
1.71V
Number of Timers
15
Instruction Set Architecture
RISC
Automotive Standard
No
ADCs
1 x 3 Bit
Program Memory Type
FLASH
Toote üksikasjad
The STMicroelectronics 32 bit MCU has ADC1/2 can be used in dual mode ADC3 usable only in single mode. It has no parity check in SRAM 2.It has 512/256K single bank flash. The bus matrix provides access from a master to a slave, enabling concurrent access and efficient operation.